Aldec Riviera 2006.02

Aldec Riviera 2006.02
<

Riviera is a high performance ASIC and large FPGA verification
solution. A common keel simulator supports VHDL, Verilog, EDIF,
SystemC, SystemVerilog, SVA, OVA and PSL in a unified, advanced
debugging environment.
.Extensive Language Support
.Compilation
.Simulation
.Simulation Databases
.Debugging
.Scripting and Batch Processing
.Support for C/C++/SystemC
.Assertion Based Verification
.Coverage
.Profiler
.Partner Interfaces
.64 bit Computing
.Linting

BUY Aldec Riviera 2006.02 30$

TAGS\: download Aldec Riviera 2006.02, discount Aldec Riviera 2006.02, cheap Aldec Riviera 2006.02