Altera Quartus II 5.0 (2 cd)

Altera Quartus II 5.0 (2 cd)
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Quartus II software version 5.0 enables the highest levels of productivity and
the fastest path to design completion for high density FPGA design. Dramatically
improve your productivity compared to traditional high density FPGA design flows.
Take advantage of the following productivity enhancing features today:
Incremental compilation reduces design iteration times up to 70 and is an FPGA
industry first. Includes incremental compilation support for the SignalTap. II
embedded logic analyzer in system verification tool.
SOPC Builder automatically builds systems in minutes.
Fast timing estimate feature generates timing estimates for high density designs
in minutes.
Push button physical synthesis technology and the automated Design Space Explorer
simplify design optimization.
Extensive cross probing support between tools helps identify and correct design
issues.
New pin planner feature enables easy I/O pin assignment planning, assignment, and
validation.
Complete command line and tool command language (Tcl) scripting interfaces give
you advanced scripting capabilities.

Technology Leadership
Quartus II software continues its tradition of technology leadership in the following
areas:
Performance
Design Flow Methodology
Incremental compilation
Structured ASIC design flow: target FPGAs or structured ASICs using the same
low cost software and same IP
Complete command line and Tcl scripting interfaces
Support for leading third party EDA tools
IP Integration Technology
SOPC Builder integration and system generation tool
Nios. II embedded processor
Extensive library of off the shelf IP cores
DSP Builder software
Place and route technology
Timing closure technology
Verification solutions
Advanced multi clock timing analysis capabilities
PowerPlay power analysis
Capability to update memory and constants in system without reconfiguring the device
Chip editor
SignalTap II embedded logic analyzer
Integration with all leading third party EDA verification tools and methodologies
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